TA1317AN Datasheet, PDF (25/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1317AN
Note
No.
3
Parameter
SW5
Vertical ramp wave amplitude OFF
SW6
B
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Measure pin 23 (V-RAMP FILTER) amplitude V_RMP as shown in the figure below.
Pin 23
(V-RAMP FILTER) waveform
V_RMP
4 Vertical drive amplification
OFF C
ON OFF B
ON
A
A (1) No signal input to pin V_IN.
(2) Set VD (V-DRIVE mode switch) (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Connect external power supply (V₆) to TP6 (V fb).
(4) Change external power supply (V₆) until pin 4 (V DRIVE) voltage is 0.8 V.
The voltage is made V_6A.
(5) Measure pin 4 voltage (V_4A) when the external power supply voltage is V_6A + 0.2 V.
(6) Calculate the drive amplification (GV) using the following formula.
V_4H
V_4A
0.8 V
V_4L
V_6A V_6A + 0.2 V
Pin 6 (V NF) external supply voltage (V₆)
V_4A − 0.8
GV = 20 "og
0.2
25
2002-09-06