TA1317AN Datasheet, PDF (32/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1317AN
Note
No.
Parameter
12 Vertical S correction (V S
correction) change amount
SW5
OFF
SW6
B
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88).
(4) Set V SHIFT (sub-address: 01) to 82.
(5) Set V S CORRECTION (sub-address: 09) to minimum (data: 80) and measure V_S
(80) as shown in the figure below.
(6) Set V S CORRECTION (sub-address: 09) to maximum (data: BF) and measure V_S
(BF) as shown in the figure below.
(7) Calculate maximum correction V_S using measured result and the following formula.
Pin 6
(V NF) waveform
V_S (80) − V_S (8F)
V_S =
× 100
V_S (80) + V_S (8F)
32
2002-09-06