TA1317AN Datasheet, PDF (34/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1317AN
Note
No.
Parameter
14 Vertical EHT compensation
(V EHT compensation)
change amount
SW5
OFF
SW6
B
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V SHIFT (sub-address: 01) data to 82.
(4) Connect external power supply (DC voltage = 0 V) to pin 3 (EHT IN).
(5) Set V-EHT COMPENSATION (sub-address: 02) to minimum (data: 80) and
measure Pin 6 (V NF) amplitude V_E (80).
(6) Set V-EHT COMPENSATION (sub-address: 02) to maximum (data: 87) and
measure Pin 6 (V NF) amplitude V_E (87).
(7) Calculate change amount V_EHT using the following formula.
V_E (80) − V_E (87)
V_EHT =
× 100
V_E (87)
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2002-09-06