DS90UH925Q-Q1 Datasheet, PDF (9/56 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Serializer with HDCP

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DS90UH925Q-Q1
SNLS336J – OCTOBER 2010 – REVISED NOVEMBER 2014
6.7 DC and AC Serial Control Bus Characteristics
Over 3.3V supply and temperature ranges unless otherwise specified.^{(1) (2) (3)}
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
V_IH
V_IL
V_HY
V_OL
I_in
t_R
t_F
t_SU;DAT
t_HD;DAT
t_SP
C_in
Input High Level
Input Low Level Voltage
Input Hysteresis
SDA RiseTime – READ
SDA Fall Time – READ
Set Up Time — READ
Hold Up Time — READ
Input Filter
Input Capacitance
SDA and SCL
SDA and SCL
SDA, I_OL = 1.25 mA
SDA or SCL, V_IN = V_DD33 or GND
SDA, RPU = 10 kΩ, Cb ≤ 400 pF, see Figure 8
See Figure 8
See Figure 8
SDA or SCL
0.7*
V_DD33
GND
0
-10
V_DD33 V
0.3*
V_DD33
V
>50
mV
0.36 V
10 µA
430
ns
20
ns
560
ns
615
ns
50
ns
<5
pF
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Typical values represent most likely parametric norms at V_DD = 3.3 V, T_A = +25 °C, and at the Recommended Operating Conditions at
the time of product characterization and are not ensured.
(3) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except V_OD and ΔV_OD, which are differential voltages.
6.8 Recommended Timing for Serial Control Bus
Over 3.3V supply and temperature ranges unless otherwise specified.
f_SCL
t_LOW
t_HIGH
t_HD;STA
t_SU:STA
t_HD;DAT
t_SU;DAT
t_SU;STO
t_BUF
t_r
t_f
SCL Clock Frequency
Standard Mode
Fast Mode
SCL Low Period
Standard Mode
Fast Mode
SCL High Period
Standard Mode
Fast Mode
Hold time for a start or a
repeated start condition
Figure 8
Standard Mode
Fast Mode
Set Up time for a start or a
repeated start condition
Figure 8
Standard Mode
Fast Mode
Data Hold Time
Figure 8
Standard Mode
Fast Mode
Data Set Up Time
Figure 8
Standard Mode
Fast Mode
Set Up Time for STOP Condition, ^{Standard Mode}
Figure 8
Fast Mode
Bus Free Time
Between STOP and START,
Figure 8
Standard Mode
Fast Mode
SCL & SDA Rise Time,
Figure 8
Standard Mode
Fast Mode
SCL & SDA Fall Time,
Figure 8
Standard Mode
Fast mode
MIN TYP
0
0
4.7
1.3
4.0
0.6
4.0
0.6
4.7
0.6
0
0
250
100
4.0
0.6
4.7
1.3
MAX UNITS
100 kHz
400 kHz
us
us
us
us
us
us
us
us
3.45 us
0.9 us
ns
ns
us
us
us
us
1000 ns
300 ns
300 ns
300 ns
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