DS90UH925Q-Q1 Datasheet, PDF (8/56 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Serializer with HDCP

DS90UH925Q-Q1
SNLS336J – OCTOBER 2010 – REVISED NOVEMBER 2014
DC Electrical Characteristics^{(1) (2) (3)} (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
PARAMETER
TEST CONDITIONS
PIN/FREQ.
FPD-LINK III CML DRIVER DC SPECIFICATIONS
V_ODp-p
Differential Output Voltage
(DOUT+) – (DOUT-)
R_L = 100Ω, Figure 1
ΔV_OD
Output Voltage Unbalance
V_OS
Offset Voltage – Single-
ended
R_L = 100Ω, Figure 1
DOUT+, DOUT-
ΔV_OS
Offset Voltage Unbalance
Single-ended
I_OS
Output Short Circuit Current DOUT+/- = 0V, PDB = L or H
R_T
Internal Termination
Resistor - Single ended
SUPPLY CURRENT
I_DD1
I_DDIO1
Supply Current
(includes load current)
R_L = 100Ω, f = 85 MHz
Checker Board Pattern,
Figure 2
V_DD33= 3.6V
V_DDIO = 3.6V
V_DDIO =
1.89V
I_DDS1
I_DDIOS1
Supply Current Remote
Auto Power Down Mode
0x01[7] = 1, deserializer
is powered down
V_DD33 = 3.6V
V_DDIO = 3.6V
V_DDIO =
1.89V
I_DDS2
I_DDIOS2
Supply Current Power
Down
PDB = L, All LVCMOS
inputs are floating or tied
to GND
V_DD33 = 3.6V
V_DDIO = 3.6V
V_DDIO =
1.89V
V_DD33
V_DDIO
V_DD33
V_DDIO
V_DD33
V_DDIO
MIN TYP
1160 1250
1
2.5-
0.25*V_O
Dp-p
(TYP)
1
−38
40
52
148
90
1
1.2
65
55
1
65
50
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MAX UNIT
1340 mVp-p
50 mV
V
50 mV
mA
62 Ω
170 mA
180 μA
1.6 mA
2.4 mA
150 μA
150 μA
2 mA
150 μA
150 μA
6.6 AC Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.^{(1) (2) (3)}
PARAMETER
TEST CONDITIONS
PIN/FREQ.
MIN
GPIO BIT RATE
Forward Channel Bit Rate
B_R
Back Channel Bit Rate
See ^{(4) (5)}
f = 5 – 85
MHz
GPIO[3:0]
RECOMMENDED TIMING for PCLK
t_TCP
t_CIH
t_CIL
t_CLKT
PCLK Period
PCLK Input High Time
PCLK Input Low Time
PCLK Input Transition Time
Figure 3 ^{(4) (5)}
See ^{(4) (5)}
PCLK
f = 5 MHz
f = 85 MHz
11.76
0.4*T
0.4*T
4.0
0.5
t_IJIT
PCLK Input Jitter Tolerance,
Bit Error Rate ≤10^–10
f / 40 < Jitter Freq < f / 20^{(5) (6)}
f=5–
78MHz
0.4
TYP
0.25* f
75
T
0.5*T
0.5*T
0.6
MAX UNIT
Mbps
kbps
200 ns
0.6*T ns
0.6*T ns
ns
ns
UI
(1) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2) Typical values represent most likely parametric norms at VDD = 3.3 V, TA = +25 °C, and at the Recommended Operating Conditions at
the time of product characterization and are not ensured.
(3) Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD and ΔVOD, which are differential voltages.
(4) Specification is ensured by design and is not tested in production.
(5) Specification is ensured by characterization and is not tested in production.
(6) Jitter Frequency is specified in conjunction with DS90UH926 PLL bandwidth.
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