 English |
|
|
|
|
|
|
|
| DS90UH925Q-Q1 Datasheet, PDF (21/56 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Serializer with HDCP | |||
| |||
| ◁ |
www.ti.com
DS90UH925Q-Q1
SNLS336J â OCTOBER 2010 â REVISED NOVEMBER 2014
7.3.14.6 Internal Pattern Generation
The DS90UH925Q-Q1 serializer supports the internal pattern generation feature. It allows basic testing and
debugging of an integrated panel through the FPD-Link III output stream. The test patterns are simple and
repetitive and allow for a quick visual verification of panel operation. As long as the device is not in power down
mode, the test pattern will be displayed even if no parallel input is applied. If no PCLK is received, the test
pattern can be configured to use a programmed oscillator frequency. For detailed information, refer to SNLA132.
7.4 Device Functional Modes
7.4.1 Configuration Select (MODE_SEL)
Configuration of the device may be done via the MODE_SEL input pin, or via the configuration register bit. A pull-
up resistor and a pull-down resistor of suggested values may be used to set the voltage ratio of the MODE_SEL
input (VR4) and VDD33 to select one of the other 10 possible selected modes. See Figure 15 and Table 4.
VDD33
R3
VR4
R4
MODE_SEL
SER
Figure 15. MODE_SEL Connection Diagram
Copyright © 2010â2014, Texas Instruments Incorporated
Product Folder Links: DS90UH925Q-Q1
Submit Documentation Feedback
21
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese