LM3S5739 Datasheet, PDF (797/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Stellaris® LM3S5739 Microcontroller
Figure 22-2. JTAG Test Clock Input Timing
J2
J3
J4
TCK
J6
J5
Figure 22-3. JTAG Test Access Port (TAP) Timing
TCK
TMS
TDI
TDO
J7
J8
J7
J8
TMS Input Valid
TMS Input Valid
J9
J10
J9
J10
TDI Input Valid
TDI Input Valid
J11
J12
J13
TDO Output Valid
TDO Output Valid
22.2.4 Reset
Table 22-16. Reset Characteristics
Parameter
No.
Parameter Parameter Name
Min Nom
Max
Unit
R1
V_TH
Reset threshold
-
2.0
-
V
R2
V_BTH
Brown-Out threshold
2.85
2.9
2.95
V
R3
T_POR
Power-On Reset timeout
-
10
-
ms
R4
T_BOR
Brown-Out timeout
-
500
-
µs
R5
T_IRPOR
Internal reset timeout after POR
R6
T_IRBOR
Internal reset timeout after BOR^a
6
-
11
ms
0
-
1
µs
R7
T_IRHWR
Internal reset timeout after hardware reset
0
-
1
ms
(RST pin)
R8
T_IRSWR
Internal reset timeout after software-initiated 2.5
-
20
µs
system reset ^a
R9
T_IRWDR
Internal reset timeout after watchdog reset^a
2.5
-
20
µs
Supply voltage (V_DD) rise time (0V-3.3V),
-
-
100
ms
power on reset
R10
T_VDDRISE
Supply voltage (V_DD) rise time (0V-3.3V),
-
-
250
µs
waking from hibernation
R11
a. 20 * t _{MOSC_per}
T_MIN
Minimum RST pulse width
2
-
-
µs
November 17, 2011
797
Texas Instruments-Production Data