LM3S5739 Datasheet, PDF (3/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Stellaris® LM3S5739 Microcontroller
Table of Contents
Revision History ............................................................................................................................. 28
About This Document .................................................................................................................... 34
Audience .............................................................................................................................................. 34
About This Manual ................................................................................................................................ 34
Related Documents ............................................................................................................................... 34
Documentation Conventions .................................................................................................................. 35
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.4.8
Architectural Overview .......................................................................................... 37
Product Features .......................................................................................................... 37
Target Applications ........................................................................................................ 46
High-Level Block Diagram ............................................................................................. 46
Functional Overview ...................................................................................................... 48
ARM Cortex™-M3 ......................................................................................................... 48
Motor Control Peripherals .............................................................................................. 49
Analog Peripherals ........................................................................................................ 49
Serial Communications Peripherals ................................................................................ 50
System Peripherals ....................................................................................................... 52
Memory Peripherals ...................................................................................................... 52
Additional Features ....................................................................................................... 53
Hardware Details .......................................................................................................... 54
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.4.5
2.4.6
2.4.7
2.5
2.5.1
2.5.2
2.5.3
The Cortex-M3 Processor ...................................................................................... 55
Block Diagram .............................................................................................................. 56
Overview ...................................................................................................................... 57
System-Level Interface .................................................................................................. 57
Integrated Configurable Debug ...................................................................................... 57
Trace Port Interface Unit (TPIU) ..................................................................................... 58
Cortex-M3 System Component Details ........................................................................... 58
Programming Model ...................................................................................................... 59
Processor Mode and Privilege Levels for Software Execution ........................................... 59
Stacks .......................................................................................................................... 59
Register Map ................................................................................................................ 60
Register Descriptions .................................................................................................... 61
Exceptions and Interrupts .............................................................................................. 74
Data Types ................................................................................................................... 74
Memory Model .............................................................................................................. 74
Memory Regions, Types and Attributes ........................................................................... 76
Memory System Ordering of Memory Accesses .............................................................. 76
Behavior of Memory Accesses ....................................................................................... 77
Software Ordering of Memory Accesses ......................................................................... 77
Bit-Banding ................................................................................................................... 78
Data Storage ................................................................................................................ 81
Synchronization Primitives ............................................................................................. 81
Exception Model ........................................................................................................... 82
Exception States ........................................................................................................... 83
Exception Types ............................................................................................................ 83
Exception Handlers ....................................................................................................... 86
November 17, 2011
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