LM3S5739 Datasheet, PDF (785/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Stellaris® LM3S5739 Microcontroller
Table 20-3. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
SWCLK
80
I
TTL
JTAG/SWD CLK.
SWDIO
79
I/O
TTL
JTAG TMS and SWDIO.
SWO
77
O
TTL
JTAG TDO and SWO.
JTAG/SWD/SWO
TCK
80
I
TTL
JTAG/SWD CLK.
TDI
78
I
TTL
JTAG TDI.
TDO
77
O
TTL
JTAG TDO and SWO.
TMS
79
I/O
TTL
JTAG TMS and SWDIO.
GND
9
-
Power Ground reference for logic and I/O pins.
15
21
33
39
45
54
57
63
69
82
87
94
GNDA
4
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
Power
7
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDO pin must
also be connected to the VDD25 pins at the board
level in addition to the decoupling capacitor(s).
VDD
8
-
Power Positive supply for I/O and some logic.
20
32
44
56
68
81
93
VDD25
14
-
Power Positive supply for most of the logic function,
38
including the processor core and most peripherals.
62
88
VDDA
3
-
Power The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
November 17, 2011
785
Texas Instruments-Production Data