LM3S5739 Datasheet, PDF (340/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Micro Direct Memory Access (μDMA)
Register 17: DMA Channel Primary Alternate Clear (DMAALTCLR), offset
0x034
Each bit of the DMAALTCLR register represents the corresponding DMA channel. Writing a 1
configures the DMA channel to use the primary control data structure.
DMA Channel Primary Alternate Clear (DMAALTCLR)
Base 0x400F.F000
Offset 0x034
Type WO, reset -
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CLR[n]
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CLR[n]
Type WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
Reset
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Bit/Field
31:0
Name
CLR[n]
Type
WO
Reset
-
Description
Channel [n] Alternate Clear
Set the appropriate bit to select the primary control data structure for
the corresponding DMA channel.
Note:
For Ping-Pong and Scatter-Gather DMA cycle types, the
controller sets these bits to select the primary channel control
data structure.
Value Description
0 No Effect
Use the DMAALTSET register to select the alternate control
data structure.
1 Primary
Selects the primary control data structure for channel [n].
340
November 17, 2011
Texas Instruments-Production Data