LM3S5739 Datasheet, PDF (7/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Stellaris® LM3S5739 Microcontroller
12.3.4 Analog-to-Digital Converter .......................................................................................... 468
12.3.5 Differential Sampling ................................................................................................... 469
12.3.6 Internal Temperature Sensor ........................................................................................ 471
12.4 Initialization and Configuration ..................................................................................... 472
12.4.1 Module Initialization ..................................................................................................... 472
12.4.2 Sample Sequencer Configuration ................................................................................. 472
12.5 Register Map .............................................................................................................. 473
12.6 Register Descriptions .................................................................................................. 474
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 500
13.1 Block Diagram ............................................................................................................ 501
13.2 Signal Description ....................................................................................................... 501
13.3 Functional Description ................................................................................................. 502
13.3.1 Transmit/Receive Logic ............................................................................................... 502
13.3.2 Baud-Rate Generation ................................................................................................. 502
13.3.3 Data Transmission ...................................................................................................... 503
13.3.4 Serial IR (SIR) ............................................................................................................. 504
13.3.5 FIFO Operation ........................................................................................................... 505
13.3.6 Interrupts .................................................................................................................... 505
13.3.7 Loopback Operation .................................................................................................... 506
13.3.8 DMA Operation ........................................................................................................... 506
13.3.9 IrDA SIR block ............................................................................................................ 507
13.4 Initialization and Configuration ..................................................................................... 507
13.5 Register Map .............................................................................................................. 508
13.6 Register Descriptions .................................................................................................. 509
14 Synchronous Serial Interface (SSI) .................................................................... 544
14.1 Block Diagram ............................................................................................................ 545
14.2 Signal Description ....................................................................................................... 545
14.3 Functional Description ................................................................................................. 546
14.3.1 Bit Rate Generation ..................................................................................................... 546
14.3.2 FIFO Operation ........................................................................................................... 546
14.3.3 Interrupts .................................................................................................................... 547
14.3.4 Frame Formats ........................................................................................................... 547
14.3.5 DMA Operation ........................................................................................................... 555
14.4 Initialization and Configuration ..................................................................................... 555
14.5 Register Map .............................................................................................................. 556
14.6 Register Descriptions .................................................................................................. 557
15 Inter-Integrated Circuit (I²C) Interface ................................................................ 584
15.1 Block Diagram ............................................................................................................ 585
15.2 Signal Description ....................................................................................................... 585
15.3 Functional Description ................................................................................................. 585
15.3.1 I²C Bus Functional Overview ........................................................................................ 586
15.3.2 Available Speed Modes ............................................................................................... 588
15.3.3 Interrupts .................................................................................................................... 589
15.3.4 Loopback Operation .................................................................................................... 589
15.3.5 Command Sequence Flow Charts ................................................................................ 590
15.4 Initialization and Configuration ..................................................................................... 597
15.5 Register Map .............................................................................................................. 598
November 17, 2011
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