LM3S5739 Datasheet, PDF (26/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Table of Contents
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USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 723
USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 724
USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 725
USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 725
USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 725
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 729
USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 729
USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 729
USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 733
USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 733
USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 733
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 734
USB Receive Control and Status Endpoint 2 Low (USBRXCSRL2), offset 0x126 ............... 734
USB Receive Control and Status Endpoint 3 Low (USBRXCSRL3), offset 0x136 ............... 734
USB Receive Control and Status Endpoint 1 High (USBRXCSRH1), offset 0x117 .............. 739
USB Receive Control and Status Endpoint 2 High (USBRXCSRH2), offset 0x127 .............. 739
USB Receive Control and Status Endpoint 3 High (USBRXCSRH3), offset 0x137 .............. 739
USB Receive Byte Count Endpoint 1 (USBRXCOUNT1), offset 0x118 .............................. 743
USB Receive Byte Count Endpoint 2 (USBRXCOUNT2), offset 0x128 .............................. 743
USB Receive Byte Count Endpoint 3 (USBRXCOUNT3), offset 0x138 .............................. 743
USB Host Transmit Configure Type Endpoint 1 (USBTXTYPE1), offset 0x11A ................... 744
USB Host Transmit Configure Type Endpoint 2 (USBTXTYPE2), offset 0x12A ................... 744
USB Host Transmit Configure Type Endpoint 3 (USBTXTYPE3), offset 0x13A ................... 744
USB Host Transmit Interval Endpoint 1 (USBTXINTERVAL1), offset 0x11B ....................... 745
USB Host Transmit Interval Endpoint 2 (USBTXINTERVAL2), offset 0x12B ....................... 745
USB Host Transmit Interval Endpoint 3 (USBTXINTERVAL3), offset 0x13B ....................... 745
USB Host Configure Receive Type Endpoint 1 (USBRXTYPE1), offset 0x11C ................... 746
USB Host Configure Receive Type Endpoint 2 (USBRXTYPE2), offset 0x12C ................... 746
USB Host Configure Receive Type Endpoint 3 (USBRXTYPE3), offset 0x13C ................... 746
USB Host Receive Polling Interval Endpoint 1 (USBRXINTERVAL1), offset 0x11D ............. 747
USB Host Receive Polling Interval Endpoint 2 (USBRXINTERVAL2), offset 0x12D ............ 747
USB Host Receive Polling Interval Endpoint 3 (USBRXINTERVAL3), offset 0x13D ............ 747
USB Request Packet Count in Block Transfer Endpoint 1 (USBRQPKTCOUNT1), offset
0x304 ........................................................................................................................... 748
USB Request Packet Count in Block Transfer Endpoint 2 (USBRQPKTCOUNT2), offset
0x308 ........................................................................................................................... 748
USB Request Packet Count in Block Transfer Endpoint 3 (USBRQPKTCOUNT3), offset
0x30C ........................................................................................................................... 748
USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS), offset 0x340 ............. 749
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS), offset 0x342 ............ 750
USB External Power Control (USBEPC), offset 0x400 ...................................................... 751
USB External Power Control Raw Interrupt Status (USBEPCRIS), offset 0x404 ................. 754
USB External Power Control Interrupt Mask (USBEPCIM), offset 0x408 ............................ 755
USB External Power Control Interrupt Status and Clear (USBEPCISC), offset 0x40C ......... 756
USB Device RESUME Raw Interrupt Status (USBDRRIS), offset 0x410 ............................ 757
USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414 ....................................... 758
USB Device RESUME Interrupt Status and Clear (USBDRISC), offset 0x418 .................... 759
USB General-Purpose Control and Status (USBGPCS), offset 0x41C ............................... 760
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November 17, 2011
Texas Instruments-Production Data