LM3S5739 Datasheet, PDF (720/856 Pages) Texas Instruments – Stellaris® LM3S5739 Microcontroller

Universal Serial Bus (USB) Controller
Register 49: USB Control and Status Endpoint 0 High (USBCSRH0), offset
0x103
Host
USBSR0H is an 8-bit register that provides control and status bits for endpoint 0.
Device
Host Mode
USB Control and Status Endpoint 0 High (USBCSRH0)
Base 0x4005.0000
Offset 0x103
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
reserved
DTWE
DT
FLUSH
Type RO
RO
RO
RO
RO
W1S
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7:3
2
1
0
Name
reserved
DTWE
DT
FLUSH
Type
RO
W1S
R/W
R/W
Reset
0x0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Toggle Write Enable
Value Description
0 The DT bit cannot be written.
1 Enables the current state of the endpoint 0 data toggle to be
written (see DT bit).
This bit is automatically cleared once the new value is written.
Data Toggle
When read, this bit indicates the current state of the endpoint 0 data
toggle.
If DTWE is set, this bit may be written with the required setting of the data
toggle. If DTWE is Low, this bit cannot be written. Care should be taken
when writing to this bit as it should only be changed to RESET USB
endpoint 0.
Flush FIFO
Value Description
0 No effect.
1 Flushes the next packet to be transmitted/read from the endpoint
0 FIFO. The FIFO pointer is reset and the TXRDY/RXRDY bit is
cleared.
This bit is automatically cleared after the flush is performed.
Important: ^{This bit should only be set when TXRDY/RXRDY is set.}
At other times, it may cause data to be corrupted.
720
November 17, 2011
Texas Instruments-Production Data