SMJ320C40_15 Datasheet, PDF (54/65 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
8
CREQx
CACKx
1
5
6
CSTRBx
CxD7--CxD0 Valid data
Valid data
3
7
4
CRDYx
2
= when signal is an input (clear = when signal is an output)
NOTE A: Before the token exchange, CACKx, CSTRBx, and CxD7--CxD0 are asserted by the ’C40 sending data. CREQx and CRDYx are input
signals asserted by the ’C40 receiving data and are asynchronous with respect to the H1 clock of the sending ’C40. After token
exchange, CREQx and CRDYx become outputs, and CSTRBx, CACKx, and CxD7--CxD0 become inputs.
Figure 26. Communication-Token Transfer Sequence, Output to an Input Port [P=t_c(H)]
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