SMJ320C40_15 Datasheet, PDF (19/65 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001
HFH package pin assignments — alphabetical listing (continued)
NAME
NO.
NAME
NO.
NAME
NO.
NAME
NO.
DV_SS§
329
DV_SS§
330
DV_SS§
350
DV_SS§
351
LA12
247
LA13
246
LA14
245
LA15
244
LD14
LD15
LD16
LD17
288
RDY0
52
287
RDY1
43
286
RESET
79
279
RESETLOC0
78
EMU0
59
LA16
237
LD18
278
RESETLOC1
76
EMU1
60
GADV_DD‡
313
GADV_DD‡
325
GADV_DD‡
326
GADV_DD‡
344
GDDV_DD‡
7
GDDV_DD‡
21
GDDV_DD‡
22
GDDV_DD‡
36
H1
204
LA17
236
LA18
235
LA19
234
LA20
233
LA21
232
LA22
231
LA23
230
LA24
229
LA25
228
LA26
227
LD19
277
LD20
276
LD21
275
LD22
274
LD23
273
LD24
272
LD25
271
LD26
270
LD27
269
LD28
267
ROMEN
180
R/W0
73
R/W1
65
STAT0
67
STAT1
68
STAT2
70
STAT3
71
STRB0
74
STRB1
66
SUBS
352
H3
203
LA27
225
LD29
266
TCK
54
IACK
212
LA28
224
LD30
265
TCLK0
201
IIOF0
IIOF1
IIOF2
IIOF3
IV_SS†
IV_SS†
IV_SS†
IV_SS†
IV_SS†
IV_SS†
IV_SS†
LA0
LA1
LA2
181
LA29
223
LD31
264
184
LA30
222
LDDV_DD‡
268
185
LADV_DD‡
226
LDDV_DD‡
280
186
LADV_DD‡
238
LDDV_DD‡
281
20
LADV_DD‡
239
LDDV_DD‡
298
69
LADV_DD‡
256
LDE
200
122
LAE
205
LLOCK
207
123
LCE0
192
LOCK
48
159
LCE1
199
LPAGE0
190
206
LD0
303
LPAGE1
197
285
LD1
302
LRDY0
191
260
LD2
301
LRDY1
198
259
LD3
300
LR/W0
189
258
LD4
299
LR/W1
194
TCLK1
202
TDO
55
TDI
56
TMS
57
TRST
58
V_DDL¶
49
V_DDL¶
140
V_DDL¶
213
V_DDL¶
304
V_SSL#
50
V_SSL#
141
V_SSL#
214
V_SSL#
305
X1
215
LA3
257
LD5
297
LSTAT0
208
X2/CLKIN
216
LA4
255
LD6
296
LSTAT1
209
LA5
254
LD7
295
LSTAT2
210
LA6
253
LD8
294
LSTAT3
211
LA7
252
LD9
293
LSTRB0
188
LA8
251
LD10
292
LSTRB1
193
LA9
250
LD11
291
NMI
187
LA10
249
LD12
290
PAGE0
72
LA11
248
LD13
289
PAGE1
64
† _{CVSS and IVSS pins are connected internally.}
‡ _{DVDD, LADVDD, LDDVDD, GDDVDD, and GADVDD pins are connected internally.}
§ _{DVSS pins are connected internally.}
¶ _{VDDL pins are connected internally.}
# _{VSSL pins are connected internally.}
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