SMJ320C40_15 Datasheet, PDF (39/65 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001
(L)DE, (L)AE, and (L)CEx enable timings (see Figure 12)
NO.
1 t_d(DEH-DZ)
2 t_d(DEL-DV)
3 t_d(AEH-AZ)
4 t_d(AEL-AV)
5 t_d(CEH-RWZ)
6 t_d(CEL-RWV)
7 t_d(CEH-SZ)
Delay time, (L)DE high to (L)D0--(L)D31 in the high-impedance state
Delay time, (L)DE low to (L)D0--(L)D31 valid
Delay time, (L)AE high to (L)A0--(L)A30 in the high-impedance state
Delay time, (L)AE low to (L)A0--(L)A30 valid
Delay time, (L)CEx high to (L)R/W0, (L)R/W1 in the high-impedance state
Delay time, (L)CEx low to (L)R/W0, (L)R/W1 valid
Delay time, (L)CEx high to (L)STRB0, (L)STRB1 in the high-impedance
state
8 t_d(CEL-SV)
9 t_d(CEH-PAGEZ)
Delay time, (L)CEx low to (L)STRB0, (L)STRB1 valid
Delay time, (L)CEx high to (L)PAGE0, (L)PAGE1 in the high-impedance
state
10 t_d(CEL-PAGEV)
Delay time, (L)CEx low to (L)PAGE0, (L)PAGE1 valid
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
320C40-40
320C40-50
MIN* MAX
0 15*
0 22
0 15*
0 21
0 15*
0 21
0 15*
0 21
0 15*
0 21
320C40-60
MIN*
0
0
0
0
0
0
MAX
15*
16
15*
16
15*
16
0 15*
0 16
0 15*
0 16
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(L)DE
(L)D31--(L)D0
1
2
Hi-Z
(L)AE
(L)A30--(L)A0
(L)CE0, (L)CE1
(L)R/W0, (L)R/W1
(L)STRB0, (L)STRB1
(L)PAGE0, (L)PAGE1
3
4
Hi-Z
5
6
Hi-Z
7
8
Hi-Z
9
10
Hi-Z
Figure 12. (L)DE, (L)AE, and (L)CEx Enable Timings
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251--1443
39