SMJ320C40_15 Datasheet, PDF (12/65 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSORS

SMJ320C40, TMP320C40
DIGITAL SIGNAL PROCESSORS
SGUS017H -- OCTOBER 1993 -- REVISED OCTOBER 2001
signal descriptions (continued)
SMJ320C40 Signal Descriptions (Continued)
SIGNAL
NAME
NO. OF
PINS
TYPE^†
DESCRIPTION
COMMUNICATION PORT 5 INTERFACE (12 PINS)
C5D7--C5D0
8
I/O
Communication port 5 data bus
CREQ5
1
I/O
Communication port 5 token-request signal
CACK5
1
I/O
Communication port 5 token-request-acknowledge signal
CSTRB5
1
I/O
Communication port 5 data-strobe signal
CRDY5
1
I/O
Communication port 5 data-ready signal
INTERRUPTS, I/O FLAGS, RESET, TIMER (12 PINS)
IIOF3--IIOF0
4
I/O
Interrupt and I/O flags
NMI
1
I
Nonmaskable interrupt. NMI is sensitive to a low-going edge.
IACK
1
O
Interrupt acknowledge
RESET
1
I
Reset signal
RESETLOC1--
RESETLOC0
2
I
Reset-vector location pins
ROMEN
1
I
On-chip ROM enable (0 = disable, 1 = enable)
TCLK0
1
I/O
Timer 0 pin
TCLK1
1
I/O
Timer 1 pin
CLOCK (4 PINS)
X1
1
O
Crystal pin
X2/CLKIN
1
I
Crystal/oscillator pin
H1
1
O
H1 clock
H3
CV_SS
DV_SS
IV_SS
DV_DD
GADV_DD
GDDV_DD
LADV_DD
LDDV_DD
SUBS
1
O
H3 clock
POWER AND GROUND (70 PINS)^§
15^§
I
Ground pins
15^§
I
Ground pins
6^§
I
Ground pins
13
I
5-V_DC supply pins
3^§
I
5-V_DC supply pins
3^§
I
5-V_DC supply pins
3^§
I
5-V_DC supply pins
3^§
I
5-V_DC supply pins
1
I
Substrate pin (tie to ground)
V_DDL
4
I
5-V_DC supply pins
V_SSL
4
I
Ground pins
† _{I = input, O = output, Z = high impedance}
‡ _{STRB0, STRB1 and associated signals (R/W1, R/W0, PAGE0, PAGE1, etc.) are effective over the address ranges defined by the}
STRB ACTIVE bits.
§ _{HFH package has additional power and ground pins to reduce noise problems.}
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