DRV8702D-Q1 Datasheet, PDF (48/66 Pages) Texas Instruments – Automotive Half-Bridge Gate Driver

DRV8702D-Q1, DRV8703D-Q1
SLVSDX8 – MARCH 2017
Typical Application (continued)
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 23 as the input parameters.
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DESIGN PARAMETER
Nominal supply voltage
Supply voltage range
FET part number
FET total gate charge
FET gate-to-drain charge
Target FET gate rise time
Motor current chopping level
Table 23. Design Parameters
REFERENCE
VM
Q_g
Q_gd
t_r
I_(CHOP)
EXAMPLE VALUE
14 V
7 V to 35 V
CSD18502Q5B
52 nC (typical)
8.4 nC (typical)
100 to 300 ns
15 A
8.2.2 Detailed Design Procedure
8.2.2.1 External FET Selection
The DRV8702D-Q1 FET support is based on the charge-pump capacity and PWM-output frequency. For a quick
calculation of FET driving capacity, use Equation 3 when drive and brake (slow decay) are the primary modes of
operation.
Q_g
I_VCP
f_(PWM)
where
• f_PWM is the maximum desired PWM frequency to be applied to the DRV8702D-Q1 inputs or the current
chopping frequency, whichever is larger.
• I_VCP is the charge-pump capacity, which depends on the VM voltage.
(3)
The internal current chopping frequency is at most equal to the PWM frequency as shown in Equation 4.
f_(PWM)
t_off
1
t_{(BLANK )}
(4)
For example, if the VM voltage of a system is 7 V (I_VCP = 8 mA) and uses a maximum PWM frequency of 40 kHz,
then the DRV8702D-Q1 device will support FETs with a Q_g up to 200 nC.
If the application requires a forced fast decay (or alternating between drive and reverse drive), use Equation 5 to
calculate the maximum FET driving capacity.
Q_g
I_VCP
2 u f_(PWM)
(5)
8.2.2.2 IDRIVE Configuration
The IDRIVE current is selected based on the gate charge of the FETs. The IDRIVE pin must be configured so
that the FET gates are charged entirely during the t_(DRIVE) time. If the selected IDRIVE current is too low for a
given FET, then the FET may not turn on completely. TI recommends adjusting these values in-system with the
required external FETs and motor to determine the best possible setting for any application.
For FETs with a known gate-to-drain charge (Q_gd) and desired rise time (t_r), the IDRIVE current can be selected
based on the Equation 6.
I_DRIVE
!
Q_gd
t_r
(6)
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