DRV8702D-Q1 Datasheet, PDF (18/66 Pages) Texas Instruments – Automotive Half-Bridge Gate Driver

DRV8702D-Q1, DRV8703D-Q1
SLVSDX8 – MARCH 2017
7 Detailed Description
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7.1 Overview
The DRV870xD-Q1 device is an half-bridge gate driver (also called a gate controller). The device integrates FET
gate drivers to control two external NMOS FETs. The device can be powered with a supply voltage from 5.5 V to
45 V.
The device has a low-power sleep mode that is enabled using the nSLEEP pin.
The gate drive strength can be adjusted to optimize a system for a given FET size without adding external series
resistors. The IDRIVE pin allows for selection of the peak current driven into the external FET gate. Both the
high-side and low-side FETs are driven with a gate source voltage (V_GS) of 10.5 V (nominal) when the VM
voltage is more than 13.5 V. At lower VM voltages, the V_GS is reduced. The high-side gate drive voltage is
generated using a doubler-architecture charge pump that regulates to the VM + 10.5 V.
This device significantly reduces the component count of discrete motor-driver systems by integrating the
required FET drive circuitry into a single device. The DRV870xD-Q1 device also has protection features beyond
traditional discrete implementations including: undervoltage lockout (UVLO), overcurrent protection (OCP), gate-
driver faults, and thermal shutdown (TSD).
A start-up (inrush) or running current limitation is built in using a fixed time-off current chopping scheme. The
chopping current level is set by selecting the value of the sense resistor and setting a voltage on the VREF pin.
A shunt-amplifier output provides accurate current measurements by the system controller. The SO pin outputs a
voltage that is approximately 20 times the voltage across the sense resistor on the DRV8702D-Q1 device. For
the DRV8703D-Q1, this gain is configurable.
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