DRV8702D-Q1 Datasheet, PDF (38/66 Pages) Texas Instruments – Automotive Half-Bridge Gate Driver

DRV8702D-Q1, DRV8703D-Q1
SLVSDX8 – MARCH 2017
www.ti.com
7.3.15 Hardware Interface
The DRV8702D-Q1 hardware interface allows the device to be configured without a SPI, however not all of the
functionality is configurable like the DRV8703D-Q1 device. The following configuration settings are fixed for the
hardware-interface device option:
• The t_off value is set to 25 µs.
• Current regulation is enabled
• The VREF pin voltage is not scaled internally (100%).
• The shunt amplifier has a fixed gain of 19.8 V/V.
7.3.15.1 IDRIVE (6-level input)
The voltage or resistance on the IDRIVE pin sets the peak source and peak sink IDRIVE setting as listed in
Table 9.
IDRIVE
RESISTANCE
< 1 kΩ to GND
33 kΩ ± 5% to
GND
200 kΩ ± 5% to
GND
> 2 MΩ to GND,
Hi-Z
68 kΩ ± 5% to
AVDD
< 1 kΩ to AVDD
IDRIVE VOLTAGE
GND
0.7 V ± 5%
2 V ± 5%
3 V ± 5%
4 V ± 5%
AVDD
Table 9. DRV8702D-Q1 IDRIVE Settings
SOURCE CURRENT
V_VM = 5.5 V
High-side: 10 mA
Low-side: 10 mA
V_VM = 13.5 V
High-side: 10 mA
Low-side: 10 mA
High-side: 20 mA
Low-side: 20 mA
High-side: 20 mA
Low-side: 20 mA
High-side: 50 mA
Low-side: 40 mA
High-side: 50 mA
Low-side: 45 mA
High-side: 145 mA
Low-side: 115 mA
High-side: 155 mA
Low-side: 130 mA
High-side: 190 mA
Low-side: 145 mA
High-side: 210 mA
Low-side: 180 mA
High-side: 240 mA
Low-side: 190 mA
High-side: 260 mA
Low-side: 225 mA
SINK CURRENT
V_VM = 5.5 V
High-side: 20 mA
Low-side: 20 mA
V_VM = 13.5 V
High-side: 20 mA
Low-side: 20 mA
High-side: 40 mA
Low-side: 40 mA
High-side: 40 mA
Low-side: 40 mA
High-side: 90 mA
Low-side: 85 mA
High-side: 95 mA
Low-side: 95 mA
High-side: 250 mA
Low-side: 235 mA
High-side: 265 mA
Low-side: 260 mA
High-side: 330 mA
Low-side: 300 mA
High-side: 350 mA
Low-side: 350 mA
High-side: 420 mA
Low-side: 360 mA
High-side: 440 mA
Low-side:430 mA
7.3.15.2 VDS (6-Level Input)
This input controls the VDS monitor trip voltage as listed in Table 10.
Table 10. DRV8702D-Q1 VDS Settings
VDS RESISTANCE
< 1 kΩ to GND
33 kΩ ± 5% to GND
200 kΩ ± 5% to GND
> 2 MΩ to GND, Hi-Z
68 kΩ ± 5% to AVDD
< 1 kΩ to AVDD
VDS VOLTAGE
GND
0.7 V ± 5%
2 V ± 5%
3 V ± 5%
4 V ± 5%
AVDD
OVERCURRENT TRIP LEVEL
(V_DS(OCP))
0.06 V
0.12 V
0.24 V
0.48 V
0.96 V
Disabled
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