DRV8702D-Q1 Datasheet, PDF (29/66 Pages) Texas Instruments – Automotive Half-Bridge Gate Driver

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DRV8702D-Q1, DRV8703D-Q1
SLVSDX8 – MARCH 2017
7.3.7 IDRIVE Pin (DRV8702D-Q1 Only)
The rise and fall times of the half-bridge output (SH pin) can be adjusted by setting the IDRIVE resistor value or
forcing a voltage onto the IDRIVE pin. The FET gate voltage ramps faster if a higher IDRIVE setting is selected.
The ramp of the FET gate directly affects the rise and fall times of the half-bridge output.
Tying the IDRIVE pin to ground selects the lowest drive setting of 10-mA source and 20-mA sink. Leaving this
pin open selects the drive setting of 155-mA high side and 130-mA low side for source current, and 265-mA high
side, 260-mA low side for sink current, at a VM voltage of 13.5 V. For a detailed list of IDRIVE configurations,
see Table 6.
IDRIVE
+
4.9 V ±
AVDD
+
190 NŸ _{3.7 V ±}
+
310 NŸ
2.5 V ±
+
1.3 V ^±
+
0.1 V ±
Digital
Core
Figure 40. IDRIVE Pin Internal Circuitry
Copyright © 2017, Texas Instruments Incorporated
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