DRV8702D-Q1 Datasheet, PDF (45/66 Pages) Texas Instruments – Automotive Half-Bridge Gate Driver

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DRV8702D-Q1, DRV8703D-Q1
SLVSDX8 – MARCH 2017
7.6.2.3 VDS Control Register Name (address = 0x04h)
VDS control is shown in Figure 51 and described in Table 21.
Return to Summary Table.
Read and write
Figure 51. VDS Control Register
7
6
SO_LIM
R/W-0b
Bit Field
7
SO_LIM
6-4 VDS
3-2 RESERVED
1
DIS_H_VDS
0
DIS_L_VDS
5
4
VDS
R/W-111b
3
2
RESERVED
R-00b
1
DIS_H_VDS
R/W-0b
0
DIS_L_VDS
R/W-0b
Table 21. VDS Control Field Descriptions
Type
R/W
R/W
R
R/W
R/W
Default
0b
111b
00b
0b
0b
Description
0b = Default operation
1b = SO output is voltage-limited to 3.6 V
Sets the V_DS(OCP) monitor for each FET
000b = 0.06 V
001b = 0.145 V
010b = 0.17 V
011b = 0.2 V
100b = 0.12 V
101b = 0.24 V
110b = 0.48 V
111b = 0.96 V
Reserved
Disables the VDS monitor on the high-side FET of half-bridge
(enabled by default)
Disables the VDS monitor on the low-side FET of half-bridge
(enabled by default)
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