DS90UB913A-Q1 Datasheet, PDF (38/51 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Serializer

DS90UB913A-Q1
SNLS443C – MAY 2013 – REVISED APRIL 2016
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Typical Applications (continued)
9.2.1.1 Design Requirements
For the typical coax design applications, use the following as input parameters:
Table 8. Coax Design Parameters
DESIGN PARAMETER
V_DDIO
V_{DD_n}
AC Coupling Capacitors for DOUT±
PCLK Frequency
EXAMPLE VALUE
1.8 V, 2.8 V, or 3.3 V
1.8 V
0.1 µF, 0.047 µF (For the unused data pin, DOUT– )
50 MHz (12-bit low frequency), 75 MHz (12-bit high frequency), 100
MHz (10-bit)
9.2.1.2 Detailed Design Procedure
Figure 31 shows the typical connection of a DS90UB913A-Q1 Serializer using a coax interface.
VDDIO
DS90UB913A-Q1
1.8 V
C8
C3
LVCMOS
Parallel
Bus
1.8 V
10 kQ
RID
VDDIO
DIN0
DIN1
DIN2
DIN3
DIN4
DIN5
DIN6
DIN7
DIN8
DIN9
DIN10
DIN11
HS
VS
PCLK
MODE
I2C
Bus
Interface
LVCMOS
Control
Interface
GPO
Control
Interface
FB3
FB4
Optional
VDDIO
PDB
GPO[0]
GPO[1]
GPO[2]
GPO[3]
RPU
RPU
SCL
SDA
C16
C17
Optional
VDDT
VDDPLL
VDDCML
VDDD
C4
C9
C5 C10
C14
C6 C11 C15
C7 C12
C13
1.8 V
FB1
1.8 V
FB2 _{1.8 V}
DOUT+
DOUT-
ID[X]
RES
DAP (GND)
C1
C2
1.8 V
RTERM
Serial
FPD-Link III
Interface
10 kQ
RID
NOTE:
C1 = 0.1 µF (50 WV)
C2 = 0.047 µF (50 WV)
C3 ± C7 = 0.01 µF
C8 - C12 = 0.1 µF
C13 - C14 = 4.7 µF
C15 = 22 µF
C16 - C17 = >100 pF
RTERM = 50 Ÿ
RPU = 1 kŸ to 4.7 kŸ
RID (see ID[x] Resistor Value Table)
FB1 - FB4: Impedance = 1 kŸ (@ 100 MHz)
low DC resistance (<1 Ÿ)
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
Figure 31. DS90UB913A-Q1 Typical Connection Diagram — Pin Control (Coax)
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