DS90UB913A-Q1 Datasheet, PDF (36/51 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Serializer

DS90UB913A-Q1
SNLS443C – MAY 2013 – REVISED APRIL 2016
Application Information (continued)
Table 7. Power-Up Sequencing Constraints for DS90UB913A-Q1
Symbol
t₀
t₁
t₂
Description
Test Conditions
Min
Typ
V_DDIO Rise Time
V_IL to V_IH on rising edge; Monotonic
signal ramp is required
0.05
V_DDIO to V_{DD_n} Delay
V_{DD_n} Rise Time
V_IL of rising edge (V_DDIO) to V_IL of rising
edge (V_{DD_n})
V_PDB < V_{IL_VDDIO}; V_IL to V_IH on rising
edge; Monotonic signal ramp is required
0
0.05
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Max
Units
1.5
ms
ms
1.5
ms
36
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