English
Language : 

DS90UB913A-Q1 Datasheet, PDF (18/51 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Serializer
DS90UB913A-Q1
SNLS443C – MAY 2013 – REVISED APRIL 2016
www.ti.com
Feature Description (continued)
8.3.4 Synchronizing Multiple Cameras
For applications requiring multiple cameras for frame-synchronization, it is recommended to utilize the General
Purpose Input/Output (GPIO) pins to transmit control signals to synchronize multiple cameras together. To
synchronize the cameras properly, the system controller needs to provide a field sync output (such as a vertical
or frame sync signal) and the cameras must be set to accept an auxiliary sync input. The vertical synchronize
signal corresponds to the start and end of a frame and the start and end of a field. Note this form of
synchronization timing relationship has a non-deterministic latency. After the control data is reconstructed from
the bidirectional control channel, there will be a time variation of the GPIO signals arriving at the different target
devices (between the parallel links). The maximum latency delta (t1) of the GPIO data transmitted across
multiple links is 25 µs.
NOTE
The user must verify that the timing variations between the different links are within their
system and timing specifications.
See Figure 12 for an example of this function.
The maximum time (t1) between the rising edge of GPIO (that is, sync signal) to the time the signal arrives at
Camera A and Camera B is 25 µs.
Camera A
CMOS
Image
Sensor
DATA
PCLK
Serializer A
Deserializer A
DATA
PCLK
FSYNC
FSYNC
I2C
I2C
Camera B
CMOS
Image
Sensor
DATA
PCLK
Serializer B
FSYNC
I2C
Deserializer B
DATA
PCLK
ECU
Module
FSYNC
I2C
C
Figure 12. Synchronizing Multiple Cameras
DES A
GPIO[n] Input
DES B
GPIO[n] Input
SER A
GPIO[n] Output
SER B
GPIO[n] Output
t1
Figure 13. GPIO Delta Latency
18
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Product Folder Links: DS90UB913A-Q1