DS90UB913A-Q1 Datasheet, PDF (26/51 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Serializer

DS90UB913A-Q1
SNLS443C – MAY 2013 – REVISED APRIL 2016
Programming (continued)
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SDA
SCL
S
START condition, or
START repeat condition
P
STOP condition
Figure 23. Start and Stop Conditions
8.5.3 I2C Pass-Through
I2C pass-through provides a way to access remote devices at the other end of the FPD-Link III interface. This
option is used to determine if an I2C instruction is transferred over to the remote I2C bus. For example, when the
I2C master is connected to the deserializer and I2C pass-through is enabled on the deserializer, any I2C traffic
targeted for the remote serializer or remote slave will be allowed to pass through the deserializer to reach those
respective devices.
See Figure 24 for an example of this function and refer to application note: I2C over DS90UB913/4 FPD-Link III
with Bidirectional Control Channel (SNLA222).
If master controller transmits I2C transaction for address 0xA0, the DES A with I2C pass-through enabled will
transfer I2C commands to remote Camera A. The DES B with I2C pass-through disabled, any I2C commands
will NOT be passed on the I2C bus to Camera B.
DS90UB913AQ
DS90UB914AQ
CMOS
Image
Sensor
DIN[11:0]
,HS,VS
PCLK
ROUT[11:0],
HS,VS,
PCLK
Camera A
Slave ID: (0xA0)
SDA
SCL
I²C
I²C
SDA
SCL
SER A:
DES A: I2C_SLAVE
Remote I2C _MASTER Proxy
Local
I2C_PASS_THRU Enabled
DS90UB913AQ
DS90UB914AQ
CMOS
Image
Sensor
DIN[11:0]
,HS,VS
PCLK
ROUT[11:0],
HS,VS,
PCLK
ECU
Module
Camera B
Slave ID: (0xA0)
SDA
SCL
I²C
I²C
SDA
SCL
SER B:
DES B: I2C_SLAVE
Remote I2C_MASTER Proxy
Local
I2C_PASS_THRU Disabled
Figure 24. I2C Pass-Through
PC
Master
8.5.4 Slave Clock Stretching
The I2C-compatible interface allows programming of the DS90UB913A-Q1, DS90UB914A-Q1, or an external
remote device (such as image sensor) through the bidirectional control. To communicate and synchronize with
remote devices on the I2C bus through the bidirectional control channel/MCU, the chipset utilizes bus clock
stretching (holding the SCL line low) during data transmission; where the I2C slave pulls the SCL line low
on the 9th clock of every I2C transfer (before the ACK signal). The slave device will not control the clock and
only stretches it until the remote peripheral has responded. The I2C master must support clock stretching to
operate with the DS90UB913A/914A chipset.
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