DS90UB913A-Q1 Datasheet, PDF (12/51 Pages) Texas Instruments – 25-MHz to 100-MHz 10/12-Bit FPD-Link III Serializer

DS90UB913A-Q1
SNLS443C – MAY 2013 – REVISED APRIL 2016
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Device Pin Name
PCLK
(RFB = H)
D_IN/R_OUT
SDA
t_f
SCL
START
t_LOW
t_r
t_f
t_HD;STA
t_BUF
t_r
t_HD;STA
t_HD;DAT
t_HIGH
t_SU;DAT
t_SU;STA
t_SU;STO
REPEATED
START
Figure 1. Bi-directional Control Bus Timing
STOP START
Signal Pattern
T
Vdiff
80%
20%
80%
Vdiff = 0V
20%
t_LHT
t_HLT
Vdiff = (D_OUT+) - (D_OUT-)
Figure 2. “Worst Case” Test Pattern for Power
Consumption
Figure 3. Serializer CML Output Load and
Transition Times
D_OUT+
D_OUT-
100 nF
100 nF
Z_Diff = 100:
50:
100:
50:
SCOPE
BW 8 4.0 GHz
Figure 4. Serializer CML Output Load and Transition Times
10/12,
HS,VS
D_IN
D_OUT+
R_L
D_OUT-
PCLK
Figure 5. Serializer VOD Setup
Single-Ended
D_OUT+ or D_OUT-
V_OUT
V_OUT
Differential
(D_OUT+) - (D_OUT-)
V_OD
| ^V_OS
0V
12
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Figure 6. Serializer VOD Diagram
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