DS90UH928Q-Q1 Datasheet, PDF (35/69 Pages) Texas Instruments – 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With HDCP

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DS90UH928Q-Q1
SNLS440C – MARCH 2013 – REVISED JULY 2016
8.4.6 HDCP I2S Audio Encryption
Depending on the quality and specifications of the audiovisual source, HDCP encryption of digital audio may be
required. When HDCP is active, packetized Data Island Transport audio is also encrypted along with the video
data per HDCP v.1.3. I2S audio transmitted in Forward Channel Frame Transport mode is not encrypted. System
designers should consult the specific HDCP specifications to determine if encryption of digital audio is required
by the specific application audiovisual source.
8.4.7 Repeater Configuration
The HDCP Cipher function is implemented in the deserializer per HDCP v1.3 specification. The DS90UH928Q-
Q1 provides HDCP decryption of audiovisual content when connected to an HDCP capable FPD-Link III
serializer. HDCP authentication and shared key generation is performed using the HDCP Control Channel, which
is embedded in the forward and backward channels of the serial link. On-chip Non-Volatile Memory (NVM) is
used to store the HDCP keys. The confidential HDCP keys are loaded by TI during the manufacturing process
and are not accessible external to the device.
The supported HDCP Repeater application provides a mechanism to extend HDCP transmission over multiple
links to multiple display devices. It authenticates all HDCP devices in the system and distributes protected
content to the HDCP Receivers using the encryption mechanisms provided in the HDCP specification.
Source
TX
1:3 Repeater
TX
RX
TX
1:3 Repeater
TX
RX
TX
RX
Display
RX
Display
TX
RX
Display
TX
1:3 Repeater
TX
RX
TX
RX
Display
RX
Display
TX
1:3 Repeater
TX
RX
TX
RX
Display
RX
Display
RX
Display
TX
RX
Display
Figure 33. HDCP Maximum Repeater Application
In the HDCP repeater application, this document refers to the DS90UH927Q-Q1 or DS90UH925Q-Q1 as the
HDCP Transmitter (TX), and refers to the DS90UH928Q-Q1 or DS90UH926Q-Q1 as the HDCP Receiver (RX).
Figure 33 shows the maximum configuration supported for HDCP Repeater implementations. Two levels of
HDCP Repeaters are supported with a maximum of three HDCP Transmitters per HDCP Receiver.
In a repeater application, the I²C interface at each TX and RX is configured to transparently pass I²C
communications upstream or downstream to any I2C device within the system. This includes a mechanism for
assigning alternate IDs (Slave Aliases) to downstream devices in the case of duplicate addresses.
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