MSP430F6779A Datasheet, PDF (12/176 Pages) Texas Instruments – Polyphase Metering SoCs

MSP430F6779A, MSP430F6778A, MSP430F6777A, MSP430F6776A, MSP430F6775A
MSP430F6769A, MSP430F6768A, MSP430F6767A, MSP430F6766A, MSP430F6765A
MSP430F6749A, MSP430F6748A, MSP430F6747A, MSP430F6746A, MSP430F6745A
SLAS982 – MAY 2014
TERMINAL
NAME
LCDCAP/R33
P5.4/SDCLK/R23
P5.5/SD0DIO/
LCDREF/R13
P5.6/SD1DIO/R03
P5.7/SD2DIO/CB2
P6.0/SD3DIO
P3.6/PM_UCA2RXD/
PM_UCA2SOMI
P3.7/PM_UCA2TXD/
PM_UCA2SIMO
P4.0/PM_UCA2CLK
P4.1/PM_UCA3RXD/
PM_UCA3SOMI
P4.2/PM_UCA3TXD/
PM_UCA3SIMO
P4.3/PM_UCA3CLK
Table 4-3. Terminal Functions – PEU Package (continued)
NO. I/O⁽¹⁾
PEU
DESCRIPTION
LCD capacitor connection
30 I/O _{Input/output port of most positive analog LCD voltage (V1)}
CAUTION: This pin must be connected to DVSS if not used.
General-purpose digital I/O
31 I/O _{SD24_B bit stream clock input/output}
Input/Output port of second most positive analog LCD voltage (V2)
General-purpose digital I/O
32 I/O ^{SD24_B converter 0 bit stream data input/output}
External reference voltage input for regulated LCD voltage
Input/Output port of third most positive analog LCD voltage (V3 or V4)
General-purpose digital I/O
33 I/O _{SD24_B converter 1 bit stream data input/output}
Input/output port of lowest analog LCD voltage (V5)
General-purpose digital I/O
34 I/O _{SD24_B converter 2 bit stream data input/output}
Comparator_B input CB2
35 I/O ^{General-purpose digital I/O}
SD24_B converter 3 bit stream data input/output
General-purpose digital I/O with mappable secondary function
36 I/O _{Default mapping: eUSCI_A2 UART receive data}
Default mapping: eUSCI_A2 SPI slave out master in
General-purpose digital I/O with mappable secondary function
37 I/O _{Default mapping: eUSCI_A2 UART transmit data}
Default mapping: eUSCI_A2 SPI slave in master out
38 I/O ^{General-purpose digital I/O with mappable secondary function}
Default mapping: eUSCI_A2 clock input/output
General-purpose digital I/O with mappable secondary function
39 I/O _{Default mapping: eUSCI_A3 UART receive data}
Default mapping: eUSCI_A3 SPI slave out master in
General-purpose digital I/O with mappable secondary function
40 I/O _{Default mapping: eUSCI_A3 UART transmit data}
Default mapping: eUSCI_A3 SPI slave in master out
41 I/O ^{General-purpose digital I/O with mappable secondary function}
Default mapping: eUSCI_A3 clock input/output
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Terminal Configuration and Functions
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MSP430F6769A MSP430F6768A MSP430F6767A MSP430F6766A MSP430F6765A MSP430F6749A
MSP430F6748A MSP430F6747A MSP430F6746A MSP430F6745A