SMJ34020A Datasheet, PDF (8/92 Pages) Texas Instruments – GRAPHICS SYSTEM PROCESSOR

SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
Pin Functions (Continued)
PIN
NAME
I/O ^†
SCLK
I
VCLK
I
VSYNC
I/O
† _{I = input, O = output}
DESCRIPTION
VIDEO INTERFACE (CONTINUED)
Serial data clock. SCLK is the same as the signal that drives VRAM serial data registers. SCLK allows the SMJ34020A
to track the VRAM serial-data-register count, providing serial-register transfer and midline-reload cycles. (SCLK can
be asynchronous to VCLK; however, it typically has a frequency that is a multiple of the VCLK frequency).
Video clock. VCLK is derived from a multiple of the video system’s dot clock and is used internally to drive the video
timing logic.
Vertical sync. VSYNC is the vertical sync signal that controls external video circuitry. VSYNC can be programmed to
be either an input or an output by modifying a control bit in the DPYCTL register.
As an output, VSYNC is the active-low vertical-sync signal generated by the SMJ34020A’s on-chip video timers.
As an input, VSYNC synchronizes the SMJ34020A video-control registers to externally generated vertical-sync
pulses. The actual synchronization can be programmed to begin at any horizontal line; this allows for any
external pipelining of signals.
Immediately following reset, VSYNC is configured as an input.
functional block diagram
HA5 – HA31 27
HBS0 – HBS3 4
HCS
HREAD
HWRITE
HINT
HRDY
HDST
HOE
GI
R0
R1
EMU0
EMU1
EMU2
EMU3
CLKIN
LCLK1
LCLK2
Host
Address
Latch
Host
Interface
PC
ST
Register
File A
Multi-
Processor
Interface
Register
File B
SP
Emulation
Interface
ALU
System
Clocks
Barrel
Shifter
Cache
Decode
I/O
Regs
LRU
Buffer/
Page-mode
Register
MUX
Bus
Control
DRAM/
VRAM
Interface
Local
Memory
and
Bus
Timing
Bus
Interface
Microcontrol ROM
Reset and Interrupts
Video
Timing
and
Control
RESET, LINT1,
LINT2
32 ^{LAD0 – LAD31}
13 _{RCA0 – RCA12}
DDIN
DDOUT
RAS
4 CAS0 – CAS3
WE
TR / QE
ALTCH
SF
PGMD
SIZE16
LRDY
BUSFLT
CAMD
VSYNC
HSYNC
CSYNC / HBLNK
CBLNK / VBLNK
VCLK
SCLK
8
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