SMJ320LC549 Datasheet, PDF (42/52 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

SMJ320LC549
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS032B – OCTOBER 2002 – REVISED MAY 2003
host-port interface timing
switching characteristics over recommended operating conditions [H = 0.5t_c(CO)]
(see Notes 5 and 6) (see Figure 29 through Figure 32)
PARAMETER
549-60
MIN
MAX
UNIT
td(DSL-HDV) Delay time, DS low to HD driven
Case 1: Shared-access mode if
tw(DSH) < 7H
5*
12*
ns
7H+20–tw(DSH)*
td(HEL-HDV1)
Delay time, HDS falling to HD valid for first byte
of a non-subsequent read: → max 20 ns^†‡
Case 2: Shared-access mode if
tw(DSH) > 7H
Case 3: Host-only mode if
tw(DSH) < 20 ns
20*
ns
40–tw(DSH)*
td(DSL-HDV2)
Delay time, DS low to HD valid, second byte
Case 4: Host-only mode if
tw(DSH) > 20 ns
20*
5*^‡
20*
ns
td(DSH-HYH) Delay time, DS high to HRDY high
10H+10* ns
tsu(HDV-HYH) Setup time, HD valid before HRDY rising edge
3H–10*
ns
th(DSH-HDV)R Hold time, HD valid after DS rising edge, read
0*
14
ns
td(COH-HYH) Delay time, CLKOUT rising edge to HRDY high
10*
ns
td(DSH-HYL) Delay time, HDS or HCS high to HRDY low
12*
ns
td(COH-HTX) Delay time, CLKOUT rising edge to HINT change
15*
ns
*Not production tested.
† _{Host-only mode timings apply for read accesses to HPIC or HPIA, write accesses to BOB, and resetting DSPINT or HINT to 0 in shared-access}
mode. HRDY does not go low for these accesses.
‡ _{Shared-access mode timings are met automatically if HRDY is used.}
NOTES: 5. SAM = shared-access mode, HOM = host-only mode
HAD stands for HCNTRL0, HCNTRL1, and HR/W.
HDS refers to either HDS1 or HDS2.
DS refers to the logical OR of HCS and HDS.
6. On host read accesses to the HPI, the setup time of HD before DS rising edge depends on the host waveforms and cannot be
specified here.
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