SMJ320LC549 Datasheet, PDF (34/52 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSOR

SMJ320LC549
FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR
SGUS032B – OCTOBER 2002 – REVISED MAY 2003
serial port receive timing
timing requirements for serial port receive [H = 0.5 t_c(CO)] (see Figure 21)
tc(SCK)
tf(SCK)
Cycle time, serial port clock
Fall time, serial port clock
tr(SCK) Rise time, serial port clock
tw(SCK) Pulse duration, serial port clock low/high
tsu(FSR) Setup time, TFSR/TADD before TCLKR falling edge
th(FSR) Hold time, TFSR/TADD after TCLKR falling edge
th(DR) Hold time, TDR after TCLKR falling edge
tsu(DR) Setup time, TDR before TCLKR falling edge
*Not production tested.
† _{The serial port design is fully static and, therefore, can operate with tc(SCK) approaching ∞.}
549-60
MIN MAX
6H*
†
6*
6*
3H*
6
6*
6
6
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
TCLKR
TFSR/TADD
TDR
Bit
th(FSR)
tsu(FSR)
tc(SCK)
tw(SCK)
tw(SCK)
tsu(DR)
th(DR)
tf(SCK)
tr(SCK)
1
2
7/15
8/16
Figure 21. Serial Port Receive Timing
34
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