C8051F336 Datasheet, PDF (84/234 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F336/7/8/9
13.2.1.3.Stack
A programmer's stack can be located anywhere in the 256-byte data memory. The stack area is desig-
nated using the Stack Pointer (SP) SFR. The SP will point to the last location used. The next value pushed
on the stack is placed at SP+1 and then SP is incremented. A reset initializes the stack pointer to location
0x07. Therefore, the first value pushed on the stack is placed at location 0x08, which is also the first regis-
ter (R0) of register bank 1. Thus, if more than one register bank is to be used, the SP should be initialized
to a location in the data memory not being used for data storage. The stack depth can extend up to
256 bytes.
13.2.2. External RAM
There are 512 bytes of on-chip RAM mapped into the external data memory space. All of these address
locations may be accessed using the external move instruction (MOVX) and the data pointer (DPTR), or
using MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit address operand
(such as @R1), then the high byte of the 16-bit address is provided by the External Memory Interface Con-
trol Register (EMI0CN as shown in SFR Definition 13.1). Note: the MOVX instruction is also used for writes
to the Flash memory. See Section “16. Flash Memory” on page 98 for details. The MOVX instruction
accesses XRAM by default.
For a 16-bit MOVX operation (@DPTR), the upper 7 bits of the 16-bit external data memory address word
are "don't cares". As a result, the 512-byte RAM is mapped modulo style over the entire 64 k external data
memory address range. For example, the XRAM byte at address 0x0000 is shadowed at addresses
0x0200, 0x0400, 0x0600, 0x0800, etc. This is a useful feature when performing a linear memory fill, as the
address pointer doesn't have to be reset when reaching the RAM block boundary.
SFR Definition 13.1. EMI0CN: External Memory Interface Control
Bit
7
6
5
4
3
2
1
0
Name
PGSEL
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xAA
Bit Name
Function
7:1 UNUSED Unused. Read = 0000000b; Write = Don’t Care
0 PGSEL XRAM Page Select.
The EMI0CN register provides the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page
of RAM. Since the upper (unused) bits of the register are always zero, the PGSEL
determines which page of XRAM is accessed.
For Example: If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be
accessed.
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