C8051F336 Datasheet, PDF (29/234 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F336/7/8/9
Table 3.1. Pin Definitions for the C8051F336/7/8/9 (Continued)
Name
P0.5
P0.6/
Pin
‘F336/7
16
15
Pin
‘F338/9
Type
21 D I/O or Port 0.5.
A In
20 D I/O or Port 0.6.
A In
Description
CNVSTR
P0.7
14
P1.0
13
P1.1
12
P1.2
11
P1.3
10
P1.4
9
P1.5
8
P1.6
7
P1.7
6
P2.0
5
P2.1
P2.2
P2.3
D In ADC0 External Convert Start or IDA0 Update Source Input.
19 D I/O or Port 0.7.
A In
18 D I/O or Port 1.0.
A In
17 D I/O or Port 1.1.
A In
16 D I/O or Port 1.2.
A In
15 D I/O or Port 1.3.
A In
14 D I/O or Port 1.4.
A In
13 D I/O or Port 1.5.
A In
12 D I/O or Port 1.6.
A In
11 D I/O or Port 1.7.
A In
10 D I/O or Port 2.0.
A In
9
D I/O or Port 2.1.
A In
8
D I/O or Port 2.2.
A In
7
D I/O or Port 2.3.
A In
Rev. 0.2
29