SI5348 Datasheet, PDF (45/54 Pages) Silicon Laboratories – Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

Si5348 Rev D Data Sheet
Pin Descriptions
Pin Name¹
Pin Number
Pin Type ^{2 Function}
RSVD
24
-
Reserved. These pins are connected to the die. Leave disconnected.
40
-
41
-
42
-
NC
23
56
-
No Connect. These pins are not connected to the die. Leave disconnec-
ted.
-
Power
VDD
32
46
60
P
Core Supply Voltage. The device core operates from a 1.8 V supply.
See the Si5348 Reference Manual for power supply filtering recommen-
dations. A 0402 1 μF capacitor should be placed very near each of these
pins.
VDDA
13
P
Core Supply Voltage 3.3 V. This core supply pin requires a 3.3 V power
source. See the Si5348 Reference Manual for power supply filtering rec-
ommendations. A 0402 1 μF capacitor should be placed very near each
of these pins.
VDDS
22
P
Status Output Voltage. The voltage on this pin determines VOL/VOH on
the LOL and LOS status output pins. Connect to either 3.3 V or 1.8 V. A
0.1 μF bypass capacitor should be placed very close to this pin.
VDDO0
29
VDDO1
33
VDDO2
36
VDDO3
43
P
Output Clock Supply Voltage 0-6. Supply voltage (3.3 V, 2.5 V, 1.8 V)
for OUTn outputs. Leave VDDO pins of unused output drivers unconnec-
P
ted. An alternate option is to connect the VDDO pin to a power supply
P
and disable the output driver to minimize current consumption. A 0402 1
μF capacitor should be placed very near each of these pins.
P
VDDO4
49
P
VDDO5
52
P
VDDO6
57
P
GND PAD
-
P
Ground Pad. This pad provides connection to ground and must be con-
nected for proper operation. Use as many vias as practical and keep the
via length to an internal ground plan as short as possible.
Note:
1. Refer to the Si5348 Reference Manual for more information on register setting names.
2. I = Input, O = Output, P = Power.
3. The IO_VDD_SEL control bit (0x0943 bit 0) selects 3.3 V or 1.8 V operation.
4. The voltage on the VDDS pin(s) determines 3.3 V or 1.8 V operation.
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