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SI5348 Datasheet, PDF (30/54 Pages) Silicon Laboratories – Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks | |||
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Si5348 Rev D Data Sheet
Electrical Specifications
Table 5.6. LVCMOS Clock Output Specifications
Parameter
Output Frequency
Duty Cycle
Output-to-Output Skew
Output Voltage High1 , 2, 3
Output Voltage Low1 , 2, 3
LVCMOS Rise and Fall
Times3
(20% to 80%)
Symbol
Test Condition
Min
Typ
fOUT
0.0001
â
fOUT1Hz
Only Available on Output 6
1
DC
fOUT <100 MHz
48
â
100 MHz < fOUT < 250 MHz
45
â
TSK
When outputs are on same DSPLLs
â
30
VOH
VDDO = 3.3 V
OUTx_CMOS_DRV=1 IOH = â10 mA VDDO Ã 0.85
â
OUTx_CMOS_DRV=2 IOH = â12 mA
â
OUTx_CMOS_DRV=3 IOH = â17 mA
â
VDDO = 2.5 V
OUTx_CMOS_DRV=1 IOH = â6 mA VDDO Ã 0.85
â
OUTx_CMOS_DRV=2 IOH = â8 mA
â
OUTx_CMOS_DRV=3 IOH = â11 mA
â
VDDO = 1.8 V
OUTx_CMOS_DRV=2 IOH = â4 mA VDDO Ã 0.85
â
OUTx_CMOS_DRV=3 IOH = â5 mA
â
VOL
VDDO = 3.3 V
OUTx_CMOS_DRV=1 IOL = 10 mA
â
â
OUTx_CMOS_DRV=2 IOL = 12 mA
â
â
OUTx_CMOS_DRV=3 IOL = 17 mA
â
â
VDDO = 2.5 V
OUTx_CMOS_DRV=1 IOL = 6 mA
â
â
OUTx_CMOS_DRV=2 IOL = 8 mA
â
â
OUTx_CMOS_DRV=3 IOL = 11 mA
â
â
VDDO = 1.8 V
OUTx_CMOS_DRV=2 IOL = 4 mA
â
â
OUTx_CMOS_DRV=3 IOL = 5 mA
â
â
tr/tf
VDDO = 3.3 V
â
400
VDDO = 2.5 V
â
450
VDDO = 1.8 V
â
550
Max
250
52
55
140
â
â
â
â
â
â
â
â
VDDO Ã 0.15
VDDO Ã 0.15
VDDO Ã 0.15
600
600
750
Unit
MHz
Hz
%
ps
V
V
V
V
V
V
ps
ps
ps
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