SI5348 Datasheet, PDF (33/54 Pages) Silicon Laboratories – Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

Table 5.9. I²C Timing Specifications (SCL,SDA)
Parameter
Symbol
Test Condition
SCL Clock Frequency
f_SCL
SMBus Timeout
—
Hold time (repeated) START
condition
Low period of the SCL clock
HIGH period of the SCL
clock
Set-up time for a repeated
START condition
Data hold time
Data set-up time
Rise time of both SDA and
SCL signals
Fall time of both SDA and
SCL signals
Set-up time for STOP condi-
tion
Bus free time between a
STOP and START condition
Data valid time
Data valid acknowledge time
t_HD:STA
t_LOW
t_HIGH
t_SU:STA
t_HD:DAT
t_SU:DAT
t_r
t_f
t_SU:STO
t_BUF
t_VD:DAT
t_VD:ACK
When Timeout is Ena-
bled
Standard Mode
100 kbps
Min
Max
—
100
25
35
4.0
—
4.7
—
4.0
—
4.7
—
100
—
250
—
—
1000
—
300
4.0
—
4.7
—
—
3.45
—
3.45
Si5348 Rev D Data Sheet
Electrical Specifications
Fast Mode
Unit
400 kbps
Min
Max
—
400
kHz
25
35
ms
0.6
—
μs
1.3
—
μs
0.6
—
μs
0.6
—
μs
100
—
ns
100
—
ns
20
300
ns
—
300
ns
0.6
—
μs
1.3
—
μs
—
0.9
μs
—
0.9
μs
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