SI5348 Datasheet, PDF (22/54 Pages) Silicon Laboratories – Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

Si5348 Rev D Data Sheet
Functional Description
3.14 Enabling Features and/or Configuration Settings Not Available in ClockBuilder Pro for Factory Pre-programmed Devices
As with essentially all modern software utilities, ClockBuilder Pro is continuously updated and enhanced. By registering at www.si-
labs.com, you will be notified whenever changes are made and what the impact of those changes are. This update process will ulti-
mately enable ClockBuilder Pro users to access all features and register setting values documented in this data sheet and the Si5348
Reference Manual.
However, if you must enable or access a feature or register setting value so that the device starts up with this feature or a register
setting, but the feature or register setting is not yet available in CBPro, you must contact a Silicon Labs applications engineer for assis-
tance. One example of this type of feature or custom setting is the customizable output amplitude and common voltages for the clock
outputs. After careful review of your project file and requirements, the Silicon Labs applications engineer will email back your CBPro
project file with your specific features and register settings enabled using what is referred to as the manual "settings override" feature of
CBPro. "Override" settings to match your request(s) will be listed in your design report file. Examples of setting "overrides" in a CBPro
design report are shown in the table below:
Table 3.4. Setting Overrides
Location
0×0435[0]
0×0B48[4:0]
Name
FORCE_HOLD_PLLA
OOF_DIV_CLK_DIS
Type
No NVM
User
Target
N/A
OPN and EVB
Dec Value
1
31
Hex Value
0×1
0×1F
Once you receive the updated design file, simply open it in CBPro. The device will begin operation after startup with the values in the
NVM file. The flowchart for this process is shown in the figure below:
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