SI5348 Datasheet, PDF (13/54 Pages) Silicon Laboratories – Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks

Si5348 Rev D Data Sheet
Functional Description
3.8 Fault Monitoring
Three input clocks (IN0, IN1, IN2) and the reference input (REF/REFb) are monitored for loss of signal (LOS) and out-of-frequency
(OOF) as shown in the figure below. The reference at the XA/XB pins is also monitored for LOS since it provides a critical reference
clock for the DSPLLs. Each of the DSPLLs also has an LOL indicator, which is asserted when synchronization is lost with their selected
input clock. Note that IN3 and IN4 are not monitored.
Si5348
XA XB
OSC
REF REFb
DSPLL B
÷ PREF
IN0
IN0b
IN1
IN1b
IN2
IN2b
IN3
IN4
÷
P0n
P0d
LOS
OOF
Precision
Fast
Input
Crosspoint
0
1
2
÷
P1n
P1d
LOS
OOF
Precision
Fast
0
1
2
0
÷
P2n
P2d
LOS
OOF
Precision
Fast
1
2
3
4
LOS
LOS
LOL ^{DSPLL A}
PD LPF
÷M
LOL ^{DSPLL C}
PD LPF
÷M
LOL ^{DSPLL D}
PD LPF
÷M
Figure 3.10. Si5348 Fault Monitors
3.8.1 Input LOS Detection
The loss of signal monitor measures the period of each input clock cycle to detect phase irregularities or missing clock edges. Each of
the input LOS circuits has its own programmable sensitivity which allows ignoring missing edges or intermittent errors. Loss of signal
sensitivity is configurable using the ClockBuilder Pro utility. The LOS status for each of the monitors is accessible by reading a status
register. The live LOS register always displays the current LOS state and a sticky register always stays asserted until cleared. An option
to disable any of the LOS monitors is also available.
Monitor
LOS
en
LOLOSS
Live
Sticky
Figure 3.11. LOS Status Indicators
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