C8051F50X Datasheet, PDF (45/312 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x-F51x
Table 5.3. Port I/O DC Electrical Characteristics
V_DD = 1.8 to 2.75 V, –40 to +125 °C unless otherwise specified.
Parameters
Output High
Voltage
Output Low
Voltage
Input High
Voltage
Conditions
I_OH = –3 mA, Port I/O push-pull
I_OH = –10 µA, Port I/O push-pull
I_OH = –10 mA, Port I/O push-pull
V_IO = 1.8 V:
I_OL = 70 µA
I_OL = 8.5 mA
V_IO = 2.7 V:
I_OL = 70 µA
I_OL = 8.5 mA
V_IO = 5.25 V:
I_OL = 70 µA
I_OL = 8.5 mA
V_REGIN = 5.25 V
Min
V_IO – 0.4
V_IO – 0.02
—
—
—
—
—
—
—
0.7 x VIO
Input Low Volt-
age
V_REGIN = 2.7 V
—
Weak Pullup Off
—
Weak Pullup On, V_IO = 2.1 V, 
V_IN = 0 V, V_DD = 1.8 V
—
Input Leakage
Current

Weak
Pullup
On,
V_IO
=
2.6
V,

V_IN = 0 V, V_DD = 2.6 V
—
Weak Pullup On, V_IO = 5.0 V, 
V_IN = 0 V, V_DD = 2.6 V
—
Typ
—
—
V_IO – 0.7
—
—
—
—
—
—
—
Max Units
—
V
—
—
50
750
45
mV
550
40
400
—
V
—
0.3 x VIO V
—
2
6
9
µA
15
22
47
115
Rev. 1.1
45