C8051F50X Datasheet, PDF (115/312 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x-F51x
Table 13.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address
Description
PCA0CPH1
0xEA
PCA Capture 1 High
PCA0CPH2
0xEC
PCA Capture 2 High
PCA0CPH3
0xEE
PCA Capture 3 High
PCA0CPH4
0xFE
PCA Capture 4 High
PCA0CPH5
0xCF
PCA Capture 5 High
PCA0CPL0
0xFB
PCA Capture 0 Low
PCA0CPL1
0xE9
PCA Capture 1 Low
PCA0CPL2
0xEB
PCA Capture 2 Low
PCA0CPL3
0xED
PCA Capture 3 Low
PCA0CPL4
0xFD
PCA Capture 4 Low
PCA0CPL5
0xCE
PCA Capture 5 Low
PCA0CPM0
0xDA
PCA Module 0 Mode Register
PCA0CPM1
0xDB
PCA Module 1 Mode Register
PCA0CPM2
0xDC
PCA Module 2 Mode Register
PCA0CPM3
0xDD
PCA Module 3 Mode Register
PCA0CPM4
PCA0CPM5
PCA0H
PCA0L
PCA0MD
PCA0PWM
PCON
PSCTL
PSW
REF0CN
REG0CN
RSTSRC
SBCON0
SBRLH0
SBRLL0
SBUF0
SCON0
SFR0CN
SFRLAST
SFRNEXT
SFRPAGE
0xDE
0xDF
0xFA
0xF9
0xD9
0xD9
0x87
0x8F
0xD0
0xD1
0xD1
0xEF
0xAB
0xAD
0xAC
0x99
0x98
0x84
0x86
0x85
0xA7
PCA Module 4 Mode Register
PCA Module 5 Mode Register
PCA Counter High
PCA Counter Low
PCA Mode
PCA PWM Configuration
Power Control
Program Store R/W Control
Program Status Word
Voltage Reference Control
Voltage Regulator Control
Reset Source Configuration/Status
UART0 Baud Rate Generator Control
UART0 Baud Rate Reload High Byte
UART0 Baud Rate Reload Low Byte
UART0 Data Buffer
UART0 Control
SFR Page Control
SFR Stack Last Page
SFR Stack Next Page
SFR Page Select
Page
305
305
305
305
305
305
305
305
305
305
305
303
303
303
303
303
303
304
304
301
302
140
134
95
74
85
146
250
251
251
250
248
107
110
109
108
Rev. 1.1
115