C8051F50X Datasheet, PDF (283/312 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x-F51x
T3XCLK
CKCON
TTTTTTSS
3 3 2 2 1 0CC
MMMMMMA A
HLHL 10
SYSCLK / 12
0
External Clock / 8
1
SYSCLK
0
TR3
1
TCLK _{TMR3L TMR3H}
Capture
External Clock / 8
TF3CEN
TMR3RLL TMR3RLH
TF3H
TF3L
TF3LEN
TF3CEN
T3SPLIT
TR3
T3XCLK
Figure 26.9. Timer 3 External Oscillator Capture Mode Block Diagram
Interrupt
Rev. 1.1
283