SI5380 Datasheet, PDF (43/50 Pages) Silicon Laboratories – Ultra-Low Phase Noise, 12-output JESD204B Clock Generator

10. Package Outline
Si5380 Data Sheet
Package Outline
Figure 10.1. Si5380 9x9 mm 64-QFN Package Diagram
Table 10.1. Package Diagram Dimensions
Dimension
MIN
NOM
MAX
A
0.80
0.85
0.90
A1
0.00
0.02
0.05
b
0.18
0.25
0.30
D
9.00 BSC
D2
5.10
5.20
5.30
e
0.50 BSC
E
9.00 BSC
E2
5.10
5.20
5.30
L
0.30
0.40
0.50
aaa
—
—
0.10
bbb
—
—
0.10
ccc
—
—
0.08
ddd
—
—
0.10
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to the JEDEC Solid State Outline MO-220.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
silabs.com | Smart. Connected. Energy-friendly.
Rev. 0.96 | 42