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SI5380 Datasheet, PDF (27/50 Pages) Silicon Laboratories – Ultra-Low Phase Noise, 12-output JESD204B Clock Generator
Si5380 Data Sheet
Electrical Specifications
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Power Supply Noise
PSRR
Normal Mode
Rejection4
10 kHz sinusoidal noise
—
-93
—
dBc
100 kHz sinusoidal noise
—
-93
—
500 kHz sinusoidal noise
—
-84
—
1 MHz sinusoidal noise
—
-79
—
Low Power Mode
10 kHz sinusoidal noise
—
-98
—
dB
100 kHz sinusoidal noise
—
-95
—
500 kHz sinusoidal noise
—
-84
—
1 MHz sinusoidal noise
—
-76
—
Output-Output Cross-
XTALK
Measured spur from adjacent
—
-75
—
dB
talk
output
Note:
1. Normal mode and low power mode amplitude and common mode voltage are programmable through register settings and can be
stored in NVM. Each output driver can be programmed independently. The typical normal mode (or low power mode) LVDS maxi-
mum is 100 mV (or 80 mV) higher than the TIA/EIA-644 maximum. Refer to the Si5380 Reference Manual for more details on
register settings.
2. Not all combinations of voltage amplitude and common mode voltages settings are possible. See the Si5380 Reference Manual
for more information.
3. Driver output impedance depends on selected output mode (Normal, Low Power).
4. Measured for 122.88 MHz carrier frequency. Sinewave noise added to VDDO (1.8 V = 50 mVpp, 2.5 V/3.3 V = 100 mVpp) and
noise spur amplitude measured.
5. Measured across two adjacent outputs, both in LVDS mode, with the victim running at 76.8 MHz and the aggressor at 92.08 MHz.
Refer to application note, "AN862: Optimizing Si534x Jitter Performance in Next Generation Internet Infrastructure Systems", for
guidance on crosstalk optimization. Note that all active outputs must be terminated when measuring crosstalk
Parameter
Output Frequency
Duty Cycle
Output-to-Output Skew
Table 5.6. LVCMOS Clock Output Specifications
Symbol
DC
TSK
Test Condition
fOUT < 100 MHz
100 MHz < fOUT < 250 MHz
Min
Typ
Max
Unit
0.48
—
250
MHz
47
—
53
%
44
—
55
—
—
100
ps
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