HYB39S256400 Datasheet, PDF (53/56 Pages) Siemens Semiconductor Group – 256 MBit Synchronous DRAM

HYB 39S256400/800/160T
256 MBit Synchronous DRAM
20.2. CAS Latency = 3
Burst Length = Full Page, CAS Latency = 3
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t _CK3
CKE High
CS
RAS
CAS
WE
BS
AP
RAx
RBx
RBy
Addr. RAx
DQM
Hi-Z
DQ
CAx
RBx
CBx
RBy
t _RRD
Ax Ax+1 Ax+2 Ax-2 Ax-1 Ax Ax+1 Bx Bx+1 Bx+2 Bx+3 Bx+4 Bx+5
Activate
Command
Bank A
Read
Command
Bank A
Activate
Command
Bank B
Read
Command
Bank B
The burst counter wraps
from the highest order
page address back to zero
during this time interval.
Burst Stop Precharge
Command Command
Bank B
Full Page burst operation does not
terminate when the burst length is satisfied;
the burst counter increments and continues
bursting beginning with the starting address.
Activate
Command
Bank B
SPT03930
Semiconductor Group
53
1998-10-01