HYB39S256400 Datasheet, PDF (16/56 Pages) Siemens Semiconductor Group – 256 MBit Synchronous DRAM

HYB 39S256400/800/160T
256 MBit Synchronous DRAM
Operating Currents
T_A = 0 to 70 °C, V_DD = 3.3 V ± 0.3 V
(Recommended Operating Conditions unless otherwise noted)
Parameter & Test Condition
Symbol -8/-8B -10
max.
Operating current
t_RC = t_RCMIN., t_CK = t_CKMIN.
Outputs Open, Burst Lengt = 4, CL = 3
All banks operated in random access
All banks operated in ping-pong
manner to maximize gapless data
access
I_CC1
x4
210 165
x8
210 165
x16
210 165
Precharge standby current in
Power Down Mode
CS = V_IH(MIN.), CKE ≤ V_IL(MAX.)
Precharge standby current in
Non-Power Down Mode
CS = V_IH(MIN.), CKE ≤ V_IH(MAX.)
No operating current
t_CK = min., CS = V_IH(MIN.),
active state (max. 4 banks)
t_CK = min.
I_CC2P
2
2
t_CK = min.
I_CC2N
19
16
CKE ≥ V_IH(MIN.)
CKE ≤ V_IL(MAX.)
I_CC3N
45
40
I_CC3P
10
10
Burst operating current
t_CK = min.,
Read command cycling
I_CC4
x4
210 165
x8
210 165
x16
210 165
Auto refresh current
t_CK = min.,
Auto Refresh command cycling
I_CC5
240 195
Self refresh current
Self Refresh Mode, CKE = 0.2 V
I_CC6
2.5 2.5
Unit Note
3
mA
mA
mA
mA ³
mA ³
mA ³
mA ³
3, 4
mA
mA
mA
mA ³
mA 3
Notes
3. These parameters depend on the cycle rate. These values are measured at 100 MHz for -8
and at 66 MHz for -10 parts. Input signals are changed once during t_CK, excepts for ICC6 and for
standby currents when t_CK = infinity.
4. These parameters are measured with continuous data stream during read access and all DQ
toggling. CL = 3 and BL = 4 is assumed and the V_DDQ current is excluded.
Semiconductor Group
16
1998-10-01