HYB39S256400 Datasheet, PDF (27/56 Pages) Siemens Semiconductor Group – 256 MBit Synchronous DRAM

HYB 39S256400/800/160T
256 MBit Synchronous DRAM
4. Read to Write Interval
4.1. Read to Write Interval
(Burst Length = 4, CAS latency = 3)
T0
T1
T2
T3
T4
T5
CLK
Minimum delay between the Read and Write
Commands = 4 + 1 = 5 cycles
DQMx
t _DQZ
Command NOP Read A NOP NOP NOP NOP
T6
T7
T8
Write latency t _DQW of DQMx
Write B NOP NOP
DQ’s
"H" or "L"
DOUT A0
DIN B0
Must be Hi-Z before
the Write Command
DIN B1
DIN B2
SPT03787
Semiconductor Group
27
1998-10-01