GS4911B Datasheet, PDF (95/119 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

Table 3-13: Configuration and Status Registers (Continued)
Register Name
A_Feedback_Divide
(GS4911B only)
A_Reference_Divide
(GS4911B only)
ACLK1_fs_Multiple
(GS4911B only)
ACLK2_fs_Multiple
(GS4911B only)
Address
3Ch-3Bh
3Eh-3Dh
3Fh
3Fh
40h
40h
Bit
31-0
31-0
15-3
2-0
15-3
2-0
Description
R/W
In the internal audio genlock block, this register
R/W
defines the numerator of the divide ratio.
This register may be programmed to manually
genlock the audio clock to the video clock.
The default value of this register will vary
depending on the output video standard selected.
Address 3Bh = bits 15-0
Address 3Ch = bits 31-16
Reference: Section 3.6.2.2 on page 56
In the internal audio genlock block, this register
R/W
defines the denominator of the divide ratio.
This register may be programmed to manually
genlock the audio clock to the video clock.
The default value of this register will vary
depending on the output video standard selected.
Address 3Dh = bits 15-0
Address 3Eh = bits 31-16
Reference: Section 3.6.2.2 on page 56
Reserved. Set these bits to zero when writing to
–
3Fh.
The user may set this register to select the desired R/W
frequency of the audio clock on ACLK1 (a multiple
of the fundamental sampling rate, fs). The audio
clock frequency may be set as: 512fs, 384fs, 256fs,
192fs, 128fs, 64fs, fs, or z-bit. See Table 3-8 for more
details.
NOTE: To output a frequency of 348fs or 192fs, bit 5
of register 31h must also be set HIGH.
Reference: Section 3.7.2 on page 63
Reserved. Set these bits to zero when writing to
–
40h.
The user may set this register to select the desired R/W
frequency of the audio clock on ACLK2 (a multiple
of the fundamental sampling rate, fs). The audio
clock frequency may be set as: 512fs, 384fs, 256fs,
192fs, 128fs, 64fs, fs, or z-bit. See Table 3-8 for more
details.
NOTE: To output a frequency of 348fs or 192fs, bit 5
of register 31h must also be set HIGH.
Reference: Section 3.7.2 on page 63
Default
–
–
–
0
–
0
GS4911B/GS4910B HD/SD/Graphics Clock and Timing
Generator with GENLOCK
Data Sheet
36655 - 5
June 2009
95 of 119