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GS4911B Datasheet, PDF (49/119 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK
Acquisition of a New Reference
When a new reference is applied, the device continues to operate in Freeze mode while
the reference format detector checks for validity as described in Section 3.5.2 on page
46. Once validity is detected, the REF_LOST pin is set LOW.
Assuming GENLOCK is LOW, the device will then attempt to genlock the selected output
clock and timing signals to the new input reference. If the output can be automatically
genlocked to the new input reference, LOCK_LOST will go LOW and the device will
re-enter Genlock mode. Otherwise, the LOCK_LOST pin will remain HIGH and the
device will enter Free Run mode.
If VID_STD[5:0] = 63 when the new reference is applied, the device will send the
detected timing parameters to the clock synthesis and timing generator blocks. The new
output format will start being generated during the first reference V period after the
reference format has been reliably established. The LOCK_LOST pin will go LOW and
the device will re-enter Genlock mode.
3.5.4 Allowable Frequency Drift on the Reference
By default, the frequency of the reference H pulse on HSYNC may drift from its expected
value by approximately +/- 0.2% before the internal video PLL loses lock. This tolerance
may be adjusted using the Max_Ref_Delta register at address 1Eh of the host interface.
The encoding scheme is shown in Table 3-3. The default value of the register is Bh.
NOTE: Regardless of the setting of this register, the device will always differentiate
between 59.94Hz and 60Hz reference standards.
Table 3-3: Max_Ref_Delta Encoding Scheme
Register
Setting
Maximum Allowable
Frequency Drift
Register
Setting
Maximum
Allowable
Frequency Drift
0h
+/- 2 -20
8h
+/- 2 -12
1h
+/- 2 -19
9h
+/- 2 -11
2h
+/- 2 -18
Ah
+/- 2 -10
3h
+/- 2 -17
Bh
+/- 2 -9
4h
+/- 2 -16
Ch
+/- 2 -8
5h
+/- 2 -15
Dh
+/- 2 -7
6h
+/- 2 -14
Eh
+/- 2 -6
7h
+/- 2 -13
Fh
+/- 2 -5
The maximum allowable frequency drift is measured as a fraction of the frequency of the
reference H pulse.
GS4911B/GS4910B HD/SD/Graphics Clock and Timing
Generator with GENLOCK
Data Sheet
36655 - 5
June 2009
49 of 119