K5P2880YCM Datasheet, PDF (5/29 Pages) Samsung semiconductor – Multi-Chip Package MEMORY 128M Bit 16Mx8 Nand Flash Memory / 8M Bit 1Mx8/512Kx16 Full CMOS SRAM

K5P2880YCM - T085
Table 2. FLASH MEMORY OPERATIONS TABLE
CLE
ALE
CE
WE
RE
WP
Mode
H
L
L
L
H
L
H
X
H
X
Read Mode
Command Input
Address Input(3clock)
H
L
L
L
H
L
H
H
H
H
Write Mode
Command Input
Address Input(3clock)
L
L
L
H
H Data Input
L
L
L
H
X Sequential Read & Data Output
L
L
X
H
H
X During Read(Busy)
X
X
X
X
X
H During Program(Busy)
X
X
X
X
X
H During Erase(Busy)
X
X⁽¹⁾
X
X
X
L
Write Protect
X
X
H
X
X
0V/VCC⁽²⁾ Stand-by
NOTE : 1. X can be VIL or VIH.
2. WP should be biased to CMOS high or CMOS low for standby.
Table 3. SRAM OPERATIONS TABLE
1. Word Mode
CS1 CS2 OE
WE BYTE SA
LB
H
X
X
X
X
X
X
X
L
X
X
X
X
X
X
X
X
X
X
X
H
L
H
H
H
VCC
X
L
L
H
H
H
VCC
X
X
L
H
L
H
VCC
X
L
L
H
L
H
VCC
X
H
L
H
L
H
VCC
X
L
L
H
X
L
VCC
X
L
L
H
X
L
VCC
X
H
L
H
X
L
VCC
X
L
Note: X means don′t care. (Must be low or high state)
2. Byte Mode
CS1 CS2 OE WE BYTE SA
H
X
X
X
X
X
X
L
X
X
X
X
L
H
H
H
VSS
SA¹⁾
L
H
L
H
VSS
SA¹⁾
L
H
X
L
VSS
SA¹⁾
Note: X means don′t care.(Must be low or high state)
1. Address input for byte operation.
LB
X
X
DNU
DNU
DNU
UB
X
X
H
X
L
H
L
L
H
L
L
UB
X
X
DNU
DNU
DNU
I/O0~7
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O0~7
High-Z
High-Z
High-Z
Dout
Din
I/O8~15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
I/O8~15
High-Z
High-Z
DNU
DNU
DNU
Mode
Deselected
Deselected
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Mode
Deselected
Deselected
Output Disabled
Lower Byte Read
Lower Byte Write
Power
Standby
Standby
Standby
Active
Active
Active
Active
Active
Active
Active
Active
Power
Standby
Standby
Active
Active
Active
-5-
Revision 0.0
June. 2001